Sciweavers

ARITH
2009
IEEE
13 years 11 months ago
Datapath Synthesis for Standard-Cell Design
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation. Numerous ar...
Reto Zimmermann
ARITH
2009
IEEE
13 years 11 months ago
IEEE Interval Standard Working Group - P1788: Current Status
Late 2008, at SCAN 2008 in El Paso, TX, an effort to standardize interval computations was started by a working group of the IEEE Microprocessor Standards Committee, titled the In...
William Edmonson, Guillaume Melquiond
ARITH
2009
IEEE
13 years 11 months ago
Computation of Decimal Transcendental Functions Using the CORDIC Algorithm
In this work we propose new decimal floating-point CORDIC algorithms for transcendental function evaluation. We show how these algorithms are mapped to a state of the art Decimal...
Álvaro Vázquez, Julio Villalba, Elis...
ARITH
2009
IEEE
13 years 11 months ago
Fully Redundant Decimal Arithmetic
Hardware implementation of all the basic radix-10 arithmetic operations is evolving as a new trend in the design and implementation of general purpose digital processors. Redundan...
Saeid Gorgin, Ghassem Jaberipur
ARITH
2009
IEEE
13 years 11 months ago
A Dual-Purpose Real/Complex Logarithmic Number System ALU
—The real Logarithmic Number System (LNS) allows fast and inexpensive multiplication and division but more expensive addition and subtraction as precision increases. Recent advan...
Mark G. Arnold, Sylvain Collange
ARITH
2009
IEEE
13 years 11 months ago
Hybrid Binary-Ternary Joint Form and Its Application in Elliptic Curve Cryptography
Jithra Adikari, Vassil S. Dimitrov, Laurent Imbert
ARITH
2009
IEEE
13 years 11 months ago
Higher Radix Squaring Operations Employing Left-to-Right Dual Recoding
We introduce a novel left-to-right leading digit first dual recoding of an operand for the purpose of designing the squaring operation on that operand. Our dual recoding yields an...
David W. Matula
ARITH
2009
IEEE
13 years 11 months ago
Advanced Clockgating Schemes for Fused-Multiply-Add-Type Floating-Point Units
The paper introduces fine-grain clockgating schemes for fused multiply-add-type floating-point units (FPU). The clockgating is based on instruction type, precision and operand v...
Jochen Preiss, Maarten Boersma, Silvia Melitta M&u...