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ARITH
2009
IEEE
13 years 10 months ago
Multi-operand Floating-Point Addition
The design of a component to perform parallel addition of multiple floating-point (FP) operands is explored in this work. In particular, a 3-input FP adder is discussed in more d...
Alexandre F. Tenca
ARITH
2009
IEEE
13 years 10 months ago
Challenges in Automatic Optimization of Arithmetic Circuits
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open and largely unsolved problem, espec...
Ajay K. Verma, Philip Brisk, Paolo Ienne
ARITH
2009
IEEE
13 years 10 months ago
Unified Approach to the Design of Modulo-(2n +/- 1) Adders Based on Signed-LSB Representation of Residues
Moduli of the form 2n ± 1, which greatly simplify certain arithmetic operations in residue number systems (RNS), have been of longstanding interest. A steady stream of designs fo...
Ghassem Jaberipur, Behrooz Parhami
ARITH
2009
IEEE
13 years 10 months ago
Energy and Delay Improvement via Decimal Floating Point Units
Interest in decimal arithmetic increased considerably in recent years. This paper presents new designs for decimal floating point (DFP) addition, multiplication, fused multiplyad...
Hossam A. H. Fahmy, Ramy Raafat, Amira M. Abdel-Ma...
ARITH
2009
IEEE
13 years 10 months ago
Certified and Fast Computation of Supremum Norms of Approximation Errors
Sylvain Chevillard, Mioara Joldes, Christoph Quiri...
ARITH
2009
IEEE
13 years 10 months ago
Polynomial Multiplication over Finite Fields Using Field Extensions and Interpolation
A method for polynomial multiplication over finite fields using field extensions and polynomial interpolation is introduced. The proposed method uses polynomial interpolation a...
Murat Cenk, Çetin Kaya Koç, Ferruh &...