ARVLSI
1995
IEEE
13 years 7 months ago
1995
IEEE
This paper presents an architecture for generating a high-speed data pattern with precise edge placement resolution by using the matched delay technique. The technique involves ...
ARVLSI
1995
IEEE
13 years 7 months ago
1995
IEEE
Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...
ARVLSI
1995
IEEE
13 years 7 months ago
1995
IEEE
ARVLSI
1995
IEEE
13 years 7 months ago
1995
IEEE
Logic partitioning is an important issue in VLSI CAD, and has been an area of active research for at least the last 25 years. Numerous approaches have been developed and many diff...
ARVLSI
1995
IEEE
13 years 7 months ago
1995
IEEE
This paper presents a method for the optimal state assignment of asynchronous state machines. Unlike state assignment for synchronous state machines, state codes must be chosen ca...
ARVLSI
1995
IEEE
13 years 7 months ago
1995
IEEE
The task of image acquisition is completely dominated by CCD-based sensors fabricated on specialized process lines. These devices provide an essentially passive means of detecting...
ARVLSI
1995
IEEE
13 years 7 months ago
1995
IEEE
This paper presents a new architecture style for the design of a parallel floating point multiplier. The proposed architecture is a synergy of trees and arrays. Architectural mod...
ARVLSI
1995
IEEE
13 years 7 months ago
1995
IEEE
A new method of retiming plesiochronous data is described. This method features latency of less than a cell-time and requires only minimal support circuitry. No flow control or ha...
ARVLSI
1995
IEEE
13 years 7 months ago
1995
IEEE