Sciweavers

ASAP
2010
IEEE
315views Hardware» more  ASAP 2010»
13 years 3 months ago
A compact FPGA-based architecture for elliptic curve cryptography over prime fields
Abstract--This paper proposes an FPGA-based applicationspecific elliptic curve processor over a prime field. This research targets applications for which compactness is more import...
Jo Vliegen, Nele Mentens, Jan Genoe, An Braeken, S...
ASAP
2010
IEEE
130views Hardware» more  ASAP 2010»
13 years 3 months ago
Newton-Raphson algorithms for floating-point division using an FMA
Nicolas Louvet, Jean-Michel Muller, Adrien Panhale...
ASAP
2010
IEEE
171views Hardware» more  ASAP 2010»
13 years 5 months ago
General-purpose FPGA platform for efficient encryption and hashing
Many applications require protection of secret or sensitive information, from sensor nodes and embedded applications to large distributed systems. The confidentiality of data can b...
Jakub Szefer, Yu-Yuan Chen, Ruby B. Lee
ASAP
2010
IEEE
185views Hardware» more  ASAP 2010»
13 years 5 months ago
ImpEDE: A multidimensional design-space exploration framework for biomedical-implant processors
Abstract—The demand for biomedical implants keeps increasing. However, most of the current implant design methodologies involve custom-ASIC design. The SiMS project aims to chang...
Dhara Dave, Christos Strydis, Georgi Gaydadjiev
ASAP
2010
IEEE
143views Hardware» more  ASAP 2010»
13 years 6 months ago
Loop transformations for interface-based hierarchies IN SDF graphs
Data-flow has proven to be an attractive computation model for programming digital signal processing (DSP) applications. A restricted version of data-flow, termed synchronous data...
Jonathan Piat, Shuvra S. Bhattacharyya, Mickaë...
ASAP
2010
IEEE
148views Hardware» more  ASAP 2010»
13 years 6 months ago
Function flattening for lease-based, information-leak-free systems
Recent research has proposed security-critical real-time embedded systems with provably-strong information containment through the use of hardware-enforced execution leases. Execut...
Xun Li, Mohit Tiwari, Timothy Sherwood, Frederic T...
ASAP
2010
IEEE
193views Hardware» more  ASAP 2010»
13 years 6 months ago
Automatic generation of polynomial-based hardware architectures for function evaluation
Abstract--Polynomial approximation is a very general technique for the evaluation of a wide class of numerical functions of one variable. This article details an architecture gener...
Florent de Dinechin, Mioara Joldes, Bogdan Pasca
ASAP
2010
IEEE
138views Hardware» more  ASAP 2010»
13 years 6 months ago
Enhancing performance of network-on-chip architectures with millimeter-wave wireless interconnects
In a traditional Network-on-Chip (NoC), latency and power dissipation increase with system size due to its inherent multi-hop communications. The performance of NoC communication ...
Sujay Deb, Amlan Ganguly, Kevin Chang, Partha Prat...
ASAP
2010
IEEE
142views Hardware» more  ASAP 2010»
13 years 6 months ago
Implementing decimal floating-point arithmetic through binary: Some suggestions
We propose several algorithms and provide some related results that make it possible to implement decimal floating-point arithmetic on a processor that does not have decimal opera...
Nicolas Brisebarre, Nicolas Louvet, Érik Ma...
ASAP
2010
IEEE
128views Hardware» more  ASAP 2010»
13 years 6 months ago
An optimized NoC architecture for accelerating TSP kernels in breakpoint median problem
Turbo Majumder, Souradip Sarkar, Partha Pande, Ana...