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ISCA
2012
IEEE
234views Hardware» more  ISCA 2012»
7 years 10 months ago
PARDIS: A programmable memory controller for the DDRx interfacing standards
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
Mahdi Nazm Bojnordi, Engin Ipek
ITCC
2005
IEEE
10 years 1 months ago
ASIC Implementation of a Unified Hardware Architecture for Non-Key Based Cryptographic Hash Primitives
Hash algorithms are a class of cryptographic primitives used for fulfilling the requirements of integrity and authentication in cryptography. In this paper, we propose and present...
T. S. Ganesh, T. S. B. Sudarshan
ISCAS
2008
IEEE
127views Hardware» more  ISCAS 2008»
10 years 2 months ago
Compact ASIC implementation of the ICEBERG block cipher with concurrent error detection
— ICEBERG is a block cipher that has been recently proposed for security applications requiring efficient FPGA implementations. In this paper, we investigate a compact ASIC imple...
Huiju Cheng, Howard M. Heys
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