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ASPDAC
1995
ACM
79views Hardware» more  ASPDAC 1995»
13 years 8 months ago
Search space reduction in high level synthesis by use of an initial circuit
Most existing high-level synthesis(HLS) systems attempt to generate a circuit from a behavioral description \out of the void", using the entire design space as the search dom...
Atsushi Masuda, Hiroshi Imai, Jeffery P. Hansen, M...
ASPDAC
1995
ACM
130views Hardware» more  ASPDAC 1995»
13 years 8 months ago
Design for testability using register-transfer level partial scan selection
Abstract - An approach to top down design for testability using register-transfer level(RTL) partial scan selection is described. We propose a scan selection technique based on tes...
Akira Motohara, Sadami Takeoka, Toshinori Hosokawa...
ASPDAC
1995
ACM
77views Hardware» more  ASPDAC 1995»
13 years 8 months ago
A scheduling algorithm for synthesis of bus-partitioned architectures
- Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
Vasily G. Moshnyaga, Fumiaki Ohbayashi, Keikichi T...
ASPDAC
1995
ACM
80views Hardware» more  ASPDAC 1995»
13 years 8 months ago
Limits of using signatures for permutation independent Boolean comparison
Janett Mohnke, Paul Molitor, Sharad Malik
ASPDAC
1995
ACM
93views Hardware» more  ASPDAC 1995»
13 years 8 months ago
Architectural simulation for a programmable DSP chip set
Jong Tae Lee, Jaemin Kim, Jae Cheol Son
ASPDAC
1995
ACM
103views Hardware» more  ASPDAC 1995»
13 years 8 months ago
A scheduling algorithm for multiport memory minimization in datapath synthesis
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
Hae-Dong Lee, Sun-Young Hwang
ASPDAC
1995
ACM
97views Hardware» more  ASPDAC 1995»
13 years 8 months ago
On hazard-free implementation of speed-independent circuits
Alex Kondratyev, Michael Kishinevsky, Alexandre Ya...
ASPDAC
1995
ACM
99views Hardware» more  ASPDAC 1995»
13 years 8 months ago
An integrated hardware-software cosimulation environment for heterogeneous systems prototyping
- In this paper, we present a hardware-software cosimulation environment for heterogeneoussystems. To be an efficient system verification environment for the rapid prototyping of h...
Yongjoo Kim, Kyuseok Kim, Youngsoo Shin, Taekyoon ...
ASPDAC
1995
ACM
87views Hardware» more  ASPDAC 1995»
13 years 8 months ago
Generic fuzzy logic CAD development tool
Eric Q. Kang, Eugene Shragowitz