Sciweavers

ASPDAC
1995
ACM
127views Hardware» more  ASPDAC 1995»
13 years 8 months ago
Reclocking for high-level synthesis
In this paper we describe, a powerful post-synthesis approach called reclocking, for performance improvement by minimizing the total execution time. By back annotating the wire del...
Pradip K. Jha, Nikil D. Dutt, Sri Parameswaran
ASPDAC
1995
ACM
85views Hardware» more  ASPDAC 1995»
13 years 8 months ago
High-level synthesis scheduling and allocation using genetic algorithms
In this article a scheduling method is presented which is capable of allocating supplementary resources during scheduling. This makes it very suitable in synthesis strategies base...
Marc J. M. Heijligers, L. J. M. Cluitmans, Jochen ...
ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
13 years 8 months ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress
ASPDAC
1995
ACM
111views Hardware» more  ASPDAC 1995»
13 years 8 months ago
A hardware-software co-simulator for embedded system design and debugging
One of the interesting problems in hardware-software co-design is that of debugging embedded software in conjunction with hardware. Currently, most software designers wait until a...
A. Ghosh, M. Bershteyn, R. Casley, C. Chien, A. Ja...
ASPDAC
1995
ACM
110views Hardware» more  ASPDAC 1995»
13 years 8 months ago
Current and charge estimation in CMOS circuits
: CMOS circuits have significant amounts of dynamic short-circuit (or through) current. This can be as large as 20% of the total in well-designed circuits, and up to 80% of the tot...
Sanjay Dhar, Dave J. Gurney
ASPDAC
1995
ACM
108views Hardware» more  ASPDAC 1995»
13 years 8 months ago
Transistor reordering rules for power reduction in CMOS gates
— The goal of transistor reordering for a logic gate is to reduce the propagation delay as well as the charging and discharging of internal capacitances to achieve low power cons...
Wen-Zen Shen, Jiing-Yuan Lin, Fong-Wen Wang
ASPDAC
1995
ACM
95views Hardware» more  ASPDAC 1995»
13 years 8 months ago
A hardware-oriented design for weighted median filters
Chun-Te Chen, Liang-Gee Chen, Jue-Hsuan Hsiao
ASPDAC
1995
ACM
58views Hardware» more  ASPDAC 1995»
13 years 8 months ago
A tool for measuring quality of test pattern for LSIs' functional design
Takashi Aoki, Tomoji Toriyama, Kenji Ishikawa, Ken...