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    ASPDAC
    1999
    ACM
    113views Hardware» more  ASPDAC 1999»
    An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures
    13 years 8 months ago
    An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures
    Download  www.cs.york.ac.uk
    In this paper, we present a fast and efficient Iterative Improvement Partitioning (IIP) technique for VLSI circuits and hybrid bucket structures on its implementation. Due to thei...
    C. K. Eem, J. W. Chong
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    ASPDAC
    1999
    ACM
    101views Hardware» more  ASPDAC 1999»
    Fast Boolean Matching Under Permutation Using Representative
    13 years 8 months ago
    Fast Boolean Matching Under Permutation Using Representative
    Download  www.lsi-cad.com
    —This paper presents an efficient method to check the equivalence of two Boolean functions under permutation of the variables. The problem is also known as Boolean matching. As ...
    Debatosh Debnath, Tsutomu Sasao
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    ASPDAC
    1999
    ACM
    63views Hardware» more  ASPDAC 1999»
    Interconnect Delay Estimation Models for Synthesis and Design Planning
    13 years 8 months ago
    Interconnect Delay Estimation Models for Synthesis and Design Planning
    Download  cadlab.cs.ucla.edu
    Jason Cong, David Zhigang Pan
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    ASPDAC
    1999
    ACM
    112views Hardware» more  ASPDAC 1999»
    Relaxed Simulated Tempering for VLSI Floorplan Designs
    13 years 8 months ago
    Relaxed Simulated Tempering for VLSI Floorplan Designs
    Download  cadlab.cs.ucla.edu
    In the past two decades, the simulated annealing technique has been considered as a powerful approach to handle many NP-hard optimization problems in VLSI designs. Recently, a new...
    Jason Cong, Tianming Kong, Dongmin Xu, Faming Lian...
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    ASPDAC
    1999
    ACM
    100views Hardware» more  ASPDAC 1999»
    Node Sampling Technique to Speed Up Probability-Based Power Estimation Methods
    13 years 8 months ago
    Node Sampling Technique to Speed Up Probability-Based Power Estimation Methods
    Download  ics.kaist.ac.kr
    We propose a new technique called node sampling to speed up the probability-based power estimation methods. It samples and processes only a small portion of total nodes to estimat...
    Hoon Choi, Hansoo Kim, In-Cheol Park, Seung Ho Hwa...
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    ASPDAC
    1999
    ACM
    85views Hardware» more  ASPDAC 1999»
    An Efficient Two-Level Partitioning Algorithm for VLSI Circuits
    13 years 8 months ago
    An Efficient Two-Level Partitioning Algorithm for VLSI Circuits
    Download  rendylu.iis.sinica.edu.tw
    Jong-Sheng Cherng, Sao-Jie Chen, Chia-Chun Tsai, J...
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    ASPDAC
    1999
    ACM
    60views Hardware» more  ASPDAC 1999»
    Timing Optimization of Logic Network Using Gate Duplication
    13 years 8 months ago
    Timing Optimization of Logic Network Using Gate Duplication
    Download  www.cecs.uci.edu
    We present a timing optimization algorithm based on the concept of gate duplication on the technologydecomposed network. We first examine the relationship between gate duplication...
    Chun-hong Chen, Chi-Ying Tsui
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    ASPDAC
    1999
    ACM
    92views Hardware» more  ASPDAC 1999»
    Hazard-Free Synthesis and Decomposition of Asynchronous Circuits
    13 years 8 months ago
    Hazard-Free Synthesis and Decomposition of Asynchronous Circuits
    Download  www.cs.york.ac.uk
    Ren-Der Chen, Jer-Min Jou, Yeu-Horng Shiau
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    ASPDAC
    1999
    ACM
    116views Hardware» more  ASPDAC 1999»
    An Automatic Router for the Pin Grid Array Package
    13 years 8 months ago
    An Automatic Router for the Pin Grid Array Package
    Download  www.cecs.uci.edu
    A Pin-Grid-Array (PGA) package router is presented in this paper. Given a chip cavity with a number of I/O pads around its boundary and an equivalent number of pins distributed on...
    Shuenn-Shi Chen, Jong-Jang Chen, Sao-Jie Chen, Chi...
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    ASPDAC
    1999
    ACM
    65views Hardware» more  ASPDAC 1999»
    Function Smoothing with Applications to VLSI Layout
    13 years 8 months ago
    Function Smoothing with Applications to VLSI Layout
    Download  vlsicad.ucsd.edu
    Ross Baldick, Andrew B. Kahng, Andrew A. Kennings,...
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