ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
: In ultra-deep submicron VLSI circuits, clock network is a major source of power consumption and power supply noise. Therefore, it is very important to minimize clock network size...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
- Routing is one of the important steps in VLSI/ULSI physical design. The rectilinear Steiner minimum tree (RSMT) construction is an essential part of routing. Since macro cells, I...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
Abstract— This paper proposes an approach to cope with temporal power/ground voltage fluctuation for static timing analysis. The proposed approach replaces temporal noise with a...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
— Sub-resolution assist features (SRAFs) provide an absolutely essential technique for critical dimension (CD) control and process window enhancement in subwavelength lithography...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
— As we are entering the network-on-chip era and system communication is becoming a dominating factor, comon abstraction and synthesis are becoming the integral part of system de...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
－ In today’s power/ground(P/G) network design, on-chip decoupling capacitors(decaps) are usually made of MOS transistors with source and drain connected together. The gate leak...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
— In this paper we present new lower bounds on BDD size. These lower bounds are derived from more general lower bounds that recently were given in the context of exact BDD minimi...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
- Domino logic is used extensively in high speed microprocessor datapath design. Although domino gates have small propagation delay, they consume relatively more power. We propose ...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
3-D IC has a great potential for improving circuit performance and degree of integration. It is also an attractive platform for system-on-chip or system-in-package solutions. A cr...