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ASPDAC
2007
ACM
105views Hardware» more  ASPDAC 2007»
13 years 7 months ago
An Efficient Computation of Statistically Critical Sequential Paths Under Retiming
Abstract-- In this paper we present the Statistical Retimingbased Timing Analysis (SRTA) algorithm. The goal is to compute the timing slack distribution for the nodes in the timing...
Mongkol Ekpanyapong, Xin Zhao, Sung Kyu Lim
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
13 years 7 months ago
VLSI Design of Multi Standard Turbo Decoder for 3G and Beyond
Turbo decoding architectures have greater error correcting capability than any other known code. Due to their excellent performance turbo codes have been employed in several trans...
Imran Ahmed, Tughrul Arslan
ASPDAC
2007
ACM
83views Hardware» more  ASPDAC 2007»
13 years 7 months ago
Design Consideration of 6.25 Gbps Signaling for High-Performance Server
Jian Hong Jiang, Weixin Gai, Akira Hattori, Yasuo ...
ASPDAC
2007
ACM
95views Hardware» more  ASPDAC 2007»
13 years 7 months ago
Optimization of Arithmetic Datapaths with Finite Word-Length Operands
Abstract: This paper presents an approach to area optimization of arithmetic datapaths that perform polynomial computations over bit-vectors with finite widths. Examples of such de...
Sivaram Gopalakrishnan, Priyank Kalla, Florian Ene...
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
13 years 7 months ago
RunBasedReordering: A Novel Approach for Test Data Compression and Scan Power
As the large size of test data volume is becoming one of the major problems in testing System-on-a-Chip (SoC), several compression coding schemes have been proposed. Extended frequ...
Hao Fang, Chenguang Tong, Xu Cheng
ASPDAC
2007
ACM
98views Hardware» more  ASPDAC 2007»
13 years 7 months ago
Efficient Automata-Based Assertion-Checker Synthesis of SEREs for Hardware Emulation
In this paper, we present a method for generating checker circuits from sequential-extended regular expressions (SEREs). Such sequences form the core of increasingly-used Assertion...
Marc Boule, Zeljko Zilic
ASPDAC
2007
ACM
109views Hardware» more  ASPDAC 2007»
13 years 7 months ago
Communication Architecture Synthesis of Cascaded Bus Matrix
Jun-hee Yoo, Dongwook Lee, Sungjoo Yoo, Kiyoung Ch...
ASPDAC
2007
ACM
87views Hardware» more  ASPDAC 2007»
13 years 7 months ago
A Retargetable Software Timing Analyzer Using Architecture Description Language
Xianfeng Li, Abhik Roychoudhury, Tulika Mitra, Pra...