Sciweavers

    ASPDAC
    2008
    ACM
    116views Hardware» more  ASPDAC 2008»
    Faster projection based methods for circuit level verification
    13 years 6 months ago
    Faster projection based methods for circuit level verification
    Download  www.cs.ubc.ca
    As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates the verification of digital circuits us...
    Chao Yan, Mark R. Greenstreet
    claim paper
    Read More »
    ASPDAC
    2008
    ACM
    72views Hardware» more  ASPDAC 2008»
    A capacitive boosted buffer technique for high-speed process-variation-tolerant interconnect in UDVS application
    13 years 6 months ago
    A capacitive boosted buffer technique for high-speed process-variation-tolerant interconnect in UDVS application
    Download  www.cecs.uci.edu
    Saihua Lin, Yu Wang 0002, Rong Luo, Huazhong Yang
    claim paper
    Read More »
    ASPDAC
    2008
    ACM
    103views Hardware» more  ASPDAC 2008»
    Dynamic supply noise measurement circuit composed of standard cells suitable for in-site SoC power integrity verification
    13 years 6 months ago
    Dynamic supply noise measurement circuit composed of standard cells suitable for in-site SoC power integrity verification
    Download  www.cecs.uci.edu
    This paper presents an all digital measurement circuit called "gated oscillator" for capturing waveforms of dynamic power supply noise. The gated oscillator is constructe...
    Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoy...
    claim paper
    Read More »
    ASPDAC
    2008
    ACM
    104views Hardware» more  ASPDAC 2008»
    Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering
    13 years 6 months ago
    Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering
    Download  users.eecs.northwestern.edu
    With continued scaling of technology into nanometer regimes, the impact of coupling induced delay variations is significant. While several coupling-aware static timers have been pr...
    Debasish Das, Kip Killpack, Chandramouli V. Kashya...
    claim paper
    Read More »
    ASPDAC
    2008
    ACM
    124views Hardware» more  ASPDAC 2008»
    MaizeRouter: Engineering an effective global router
    13 years 6 months ago
    MaizeRouter: Engineering an effective global router
    Download  www.eecs.umich.edu
    In this paper, we present the complete design and architectural details of MAIZEROUTER. MAIZEROUTER reflects a significant leap in progress over existing publicly available routing...
    Michael D. Moffitt
    claim paper
    Read More »
    ASPDAC
    2008
    ACM
    77views Hardware» more  ASPDAC 2008»
    Symmetry-aware placement with transitive closure graphs for analog layout design
    13 years 6 months ago
    Symmetry-aware placement with transitive closure graphs for analog layout design
    Download  www.aspdac.com
    Lihong Zhang, C.-J. Richard Shi, Yingtao Jiang
    claim paper
    Read More »
    ASPDAC
    2008
    ACM
    104views Hardware» more  ASPDAC 2008»
    Low power clock buffer planning methodology in F-D placement for large scale circuit design
    13 years 6 months ago
    Low power clock buffer planning methodology in F-D placement for large scale circuit design
    Download  dropzone.tamu.edu
    Traditionally, clock network layout is performed after cell placement. Such methodology is facing a serious problem in nanometer IC designs where people tend to use huge clock buff...
    Yanfeng Wang, Qiang Zhou, Yici Cai, Jiang Hu, Xian...
    claim paper
    Read More »
    ASPDAC
    2008
    ACM
    85views Hardware» more  ASPDAC 2008»
    ORB: An on-chip optical ring bus communication architecture for multi-processor systems-on-chip
    13 years 6 months ago
    ORB: An on-chip optical ring bus communication architecture for multi-processor systems-on-chip
    Download  www.engr.colostate.edu
    Abstract
    Sudeep Pasricha, Nikil Dutt
    claim paper
    Read More »
    ASPDAC
    2008
    ACM
    174views Hardware» more  ASPDAC 2008»
    Chebyshev Affine Arithmetic based parametric yield prediction under limited descriptions of uncertainty
    13 years 6 months ago
    Chebyshev Affine Arithmetic based parametric yield prediction under limited descriptions of uncertainty
    Download  www.cecs.uci.edu
    In modern circuit design, it is difficult to provide reliable parametric yield prediction since the real distribution of process data is hard to measure. Most existing approaches ...
    Jin Sun, Yue Huang, Jun Li, Janet Meiling Wang
    claim paper
    Read More »
    ASPDAC
    2008
    ACM
    97views Hardware» more  ASPDAC 2008»
    A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures
    13 years 6 months ago
    A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures
    Download  www.ics.uci.edu
    Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
    Aviral Shrivastava, Ilya Issenin, Nikil Dutt
    claim paper
    Read More »
    « first‹ previous123456789…next ›last »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.