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    ASPDAC
    2008
    ACM
    71views Hardware» more  ASPDAC 2008»
    Multithreaded coprocessor interface for multi-core multimedia SoC
    13 years 6 months ago
    Multithreaded coprocessor interface for multi-core multimedia SoC
    Download  www.cecs.uci.edu
    Shih-Hao Ou, Tay-Jyi Lin, Xiang Sheng Deng, Zhi Ho...
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    ASPDAC
    2008
    ACM
    120views Hardware» more  ASPDAC 2008»
    In-vehicle vision processors for driver assistance systems
    13 years 6 months ago
    In-vehicle vision processors for driver assistance systems
    Download  www.cecs.uci.edu
    - This paper describes existing designs and future design trends of in-vehicle vision processors for driver assistance systems. First, requirements of vision processors for driver ...
    Shorin Kyo, Shin'ichiro Okazaki
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    ASPDAC
    2008
    ACM
    81views Hardware» more  ASPDAC 2008»
    A 1.2GHz delayed clock generator for high-speed microprocessors
    13 years 6 months ago
    A 1.2GHz delayed clock generator for high-speed microprocessors
    Download  www.cecs.uci.edu
    Inhwa Jung, Moo-young Kim, Chulwoo Kim
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    ASPDAC
    2008
    ACM
    94views Hardware» more  ASPDAC 2008»
    Distribution arithmetic for stochastical analysis
    13 years 6 months ago
    Distribution arithmetic for stochastical analysis
    Download  www.aspdac.com
    Markus Olbrich, Erich Barke
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    ASPDAC
    2008
    ACM
    97views Hardware» more  ASPDAC 2008»
    Small-area CMOS RF distributed mixer using multi-port inductors
    13 years 6 months ago
    Small-area CMOS RF distributed mixer using multi-port inductors
    Download  www.cecs.uci.edu
    This paper presents a novel small-area distributed mixer for ultrawide-band (UWB) receivers. The proposed mixer uses five 4-port inductors instead of fifteen 2-port inductors to sh...
    Susumu Sadoshima, Satoshi Fukuda, Tackya Yammouch,...
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    ASPDAC
    2008
    ACM
    87views Hardware» more  ASPDAC 2008»
    An efficient performance improvement method utilizing specialized functional units in Behavioral Synthesis
    13 years 6 months ago
    An efficient performance improvement method utilizing specialized functional units in Behavioral Synthesis
    Download  www.cecs.uci.edu
    This paper proposes a novel Behavioral Synthesis method that improves performance of synthesized circuits utilizing specialized functional units effectively. Specialized functional...
    Tsuyoshi Sadakata, Yusuke Matsunaga
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    ASPDAC
    2008
    ACM
    115views Hardware» more  ASPDAC 2008»
    GECOM: Test data compression combined with all unknown response masking
    13 years 6 months ago
    GECOM: Test data compression combined with all unknown response masking
    Download  www.cecs.uci.edu
    This paper introduces GECOM technology, a novel test compression method with seamless integration of test GE
    Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsu...
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    ASPDAC
    2008
    ACM
    154views Hardware» more  ASPDAC 2008»
    Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
    13 years 6 months ago
    Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
    Download  cobweb.ecn.purdue.edu
    Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
    Swaroop Ghosh, Kaushik Roy
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    ASPDAC
    2008
    ACM
    101views Hardware» more  ASPDAC 2008»
    Interconnect modeling for improved system-level design optimization
    13 years 6 months ago
    Interconnect modeling for improved system-level design optimization
    Download  vlsicad.ucsd.edu
    Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
    Luca P. Carloni, Andrew B. Kahng, Swamy Muddu, Ale...
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    ASPDAC
    2008
    ACM
    90views Hardware» more  ASPDAC 2008»
    Vertical via design techniques for multi-layered P/G networks
    13 years 6 months ago
    Vertical via design techniques for multi-layered P/G networks
    Download  www.cecs.uci.edu
    - In multi-layered power/ground (P/G) networks, to connect the whole network together, vertical vias are usually placed at intersections between metal wires of adjoining layers. In...
    Shuai Li, Jin Shi, Yici Cai, Xianlong Hong
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