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ASPDAC
2009
ACM
110views Hardware» more  ASPDAC 2009»
13 years 10 months ago
A software solution for dynamic stack management on scratch pad memory
Abstract— In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed instead of caches, which can consume majority of processor power. Howe...
Arun Kannan, Aviral Shrivastava, Amit Pabalkar, Jo...
ASPDAC
2009
ACM
142views Hardware» more  ASPDAC 2009»
13 years 10 months ago
On the futility of statistical power optimization
In response to the increasing variations in integrated-circuit manufacturing, the current trend is to create designs that take these variations into account statistically. In this...
Jason Cong, Puneet Gupta, John Lee
ASPDAC
2009
ACM
262views Hardware» more  ASPDAC 2009»
13 years 10 months ago
Fault modeling and testing of retention flip-flops in low power designs
Low power circuits have become a necessary part in modern designs. Retention flip-flop is one of the most important components in low power designs. Conventional test methodologie...
Bing-Chuan Bai, Augusli Kifli, Chien-Mo James Li, ...
ASPDAC
2009
ACM
164views Hardware» more  ASPDAC 2009»
13 years 10 months ago
Accounting for non-linear dependence using function driven component analysis
Majority of practical multivariate statistical analyses and optimizations model interdependence among random variables in terms of the linear correlation among them. Though linear...
Lerong Cheng, Puneet Gupta, Lei He
ASPDAC
2009
ACM
161views Hardware» more  ASPDAC 2009»
13 years 10 months ago
Risk aversion min-period retiming under process variations
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
Jia Wang, Hai Zhou
ASPDAC
2009
ACM
145views Hardware» more  ASPDAC 2009»
13 years 10 months ago
High performance on-chip differential signaling using passive compensation for global communication
— To address the performance limitation brought by the scaling issues of on-chip global wires, a new configuration for global wiring using on-chip lossy transmission lines is pr...
Ling Zhang, Yulei Zhang, Akira Tsuchiya, Masanori ...
ASPDAC
2009
ACM
119views Hardware» more  ASPDAC 2009»
13 years 10 months ago
A Time-to-Digital Converter with small circuitry
Kazuya Shimizu, Masato Kaneta, HaiJun Lin, Haruo K...
ASPDAC
2009
ACM
105views Hardware» more  ASPDAC 2009»
13 years 10 months ago
Fast circuit simulation on graphics processing units
Kanupriya Gulati, John F. Croix, Sunil P. Khatri, ...
ASPDAC
2009
ACM
117views Hardware» more  ASPDAC 2009»
13 years 10 months ago
Adaptive techniques for overcoming performance degradation due to aging in digital circuits
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a major reliability concern in present-day digital circuit design. Further, with the recent usage of...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...