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ASPDAC
2009
ACM
152views Hardware» more  ASPDAC 2009»
13 years 11 months ago
A novel Toffoli network synthesis algorithm for reversible logic
—Reversible logic studies have promising potential on energy lossless circuit design, quantum computation, nanotechnology, etc. Reversible logic features a one-to-one input outpu...
Yexin Zheng, Chao Huang
ASPDAC
2009
ACM
135views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Analysis of communication delay bounds for network on chips
—In network-on-chip, computing worst-case delay bound for packet delivery is crucial for designing predictable systems but yet an intractable problem due to complicated resource ...
Yue Qian, Zhonghai Lu, Wenhua Dou
ASPDAC
2009
ACM
127views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Timing driven power gating in high-level synthesis
- The power gating technique is useful in reducing standby leakage current, but it increases the gate delay. For a functional unit, its maximum allowable delay (for a target clock ...
Shih-Hsu Huang, Chun-Hua Cheng
ASPDAC
2009
ACM
115views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Incremental and on-demand random walk for iterative power distribution network analysis
— Power distribution networks (PDNs) are designed and analyzed iteratively. Random walk is among the most efficient methods for PDN analysis. We develop in this paper an increme...
Yiyu Shi, Wei Yao, Jinjun Xiong, Lei He
ASPDAC
2009
ACM
139views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Hardware-dependent software synthesis for many-core embedded systems
Abstract— This paper presents synthesis of Hardware Dependent Software (HdS) for multicore and many-core designs using Embedded System Environment (ESE). ESE is a tool set, devel...
Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho...
ASPDAC
2009
ACM
122views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Tolerating process variations in high-level synthesis using transparent latches
—Considering process variability at the behavior synthesis level is necessary, because it makes some instances of function units slower and others faster, resulting in unbalanced...
Yibo Chen, Yuan Xie
ASPDAC
2009
ACM
115views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform
— Multiprocessors on a chip are the reality of these days. Semiconductor industry has recognized this approach as the most efficient in order to exploit chip resources, but the ...
Antonino Tumeo, Marco Branca, Lorenzo Camerini, Ma...
ASPDAC
2009
ACM
171views Hardware» more  ASPDAC 2009»
13 years 11 months ago
A current-mode DC-DC converter using a quadratic slope compensation scheme
— A quadratic slope compensation scheme for a current-mode DC-DC converter to obtain stable frequency characteristics without depending on the input and output voltages is propos...
Chihiro Kawabata, Yasuhiro Sugimoto
ASPDAC
2009
ACM
155views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Variation-aware resource sharing and binding in behavioral synthesis
— As technology scales, the delay uncertainty caused by process variations has become increasingly pronounced in deep submicron designs. In the presence of process variations, wo...
Feng Wang 0004, Yuan Xie, Andres Takach