ASYNC
1998
IEEE
13 years 8 months ago
1998
IEEE
ASYNC
1998
IEEE
13 years 8 months ago
1998
IEEE
We present the XDI Model for specifying delay-insensitive circuits, that is, reactive systems that correctly exchange signals with their environment in spite of unknown delays inc...
ASYNC
1998
IEEE
13 years 8 months ago
1998
IEEE
None of the available minimizers for exact 2-level hazard-free logic minimization can synthesize very large circuits. This limitation has forced researchers to resort to heuristic...
ASYNC
1998
IEEE
13 years 8 months ago
1998
IEEE
Analogue to digital (A-D) converters with a xed conversion time are subject to errors due to metastability. These errors will occur in all converter designs with a bounded time fo...
ASYNC
1998
IEEE
13 years 8 months ago
1998
IEEE
A technique is presented to predict the performance behavior of control circuits for a linear FIFO. The control circuit consists of a linear chain of RendezVous elements, also cal...
ASYNC
1998
IEEE
13 years 8 months ago
1998
IEEE
We describe an automated method (3D-map) for determining near-optimal decomposed generalized C-element (gC) implementations of extended burst-mode asynchronous controllers. Averag...
ASYNC
1998
IEEE
13 years 8 months ago
1998
IEEE
This paper presents the architecture and design of a high-performance asynchronous Huffman decoder for compressed-code embedded processors. In such processors, embedded programs a...