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    FPL
    2008
    Springer
    107views Hardware» more  FPL 2008»
    Scalable high-throughput SRAM-based architecture for IP-lookup using FPGA
    13 years 6 months ago
    Scalable high-throughput SRAM-based architecture for IP-lookup using FPGA
    Download  halcyon.usc.edu
    Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. However, this approach results in inefficient memory utilization. Due to available...
    Hoang Le, Weirong Jiang, Viktor K. Prasanna
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    FCCM
    2009
    IEEE
    123views VLSI» more  FCCM 2009»
    Scalable High Throughput and Power Efficient IP-Lookup on FPGA
    13 years 8 months ago
    Scalable High Throughput and Power Efficient IP-Lookup on FPGA
    Download  halcyon.usc.edu
    Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmab...
    Hoang Le, Viktor K. Prasanna
    claim paper
    Read More »
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