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CSREAESA
2009
13 years 5 months ago
Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
Bradley F. Dutton, Charles E. Stroud
ITC
1998
IEEE
104views Hardware» more  ITC 1998»
13 years 8 months ago
Built-in self-test of FPGA interconnect
: We introduce the first BIST approach for testing the programmable routing network in FPGAs. Our method detects opens in, and shorts among, wiring segments, and also faults affect...
Charles E. Stroud, Sajitha Wijesuriya, Carter Hami...