Sciweavers

DAC
1999
ACM
13 years 8 months ago
On ILP Formulations for Built-In Self-Testable Data Path Synthesis
In this paper, we present a new method to the built-in selftestable data path synthesis based on integer linear programming (ILP). Our method performs system register assignment, ...
Han Bin Kim, Dong Sam Ha, Takeshi Takahashi
DATE
2007
IEEE
109views Hardware» more  DATE 2007»
13 years 11 months ago
Toward a scalable test methodology for 2D-mesh Network-on-Chips
1 This paper presents a BIST strategy for testing the NoC interconnect network, and investigates if the strategy is a suitable approach for the task. All switches and links in the ...
Kim Petersén, Johnny Öberg
IOLTS
2008
IEEE
112views Hardware» more  IOLTS 2008»
13 years 11 months ago
A Modular Memory BIST for Optimized Memory Repair
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Most of the existing built-in self-repair solutions reuse IP-C...
Philipp Öhler, Alberto Bosio, Giorgio Di Nata...
DATE
2008
IEEE
226views Hardware» more  DATE 2008»
13 years 11 months ago
A General Method to Evaluate RF BIST Techniques Based on Non-parametric Density Estimation
Abstract— We present a general method to evaluate RF BuiltIn Self-Test (BIST) techniques during the design stage. In particular, the adaptive kernel estimator is used to construc...
Haralampos-G. D. Stratigopoulos, Jeanne Tongbong, ...
DFT
2009
IEEE
178views VLSI» more  DFT 2009»
13 years 11 months ago
Soft Core Embedded Processor Based Built-In Self-Test of FPGAs
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
Bradley F. Dutton, Charles E. Stroud