Sciweavers

CORR
2010
Springer
176views Education» more  CORR 2010»
13 years 4 months ago
Bus Protocols: MSC-Based Specifications and Translation into Program of Verification Tool for Formal Verification
Message Sequence Charts (MSCs) are an appealing visual formalism mainly used in the early stages of system design to capture the system requirements. However, if we move towards a...
Kamrul Hasan Talukder
CODES
2002
IEEE
13 years 9 months ago
Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems
This paper deals with specific issues related to the design of distributed embedded systems implemented with mixed, eventtriggered and time-triggered task sets, which communicate ...
Traian Pop, Petru Eles, Zebo Peng
ECRTS
2003
IEEE
13 years 9 months ago
Schedulability Analysis for Distributed Heterogeneous Time/Event Triggered Real-Time Systems
This paper deals with specific issues related to the design of distributed embedded systems implemented with mixed, event-triggered and time-triggered task sets, which communicate...
Traian Pop, Petru Eles, Zebo Peng
ISCAS
2008
IEEE
141views Hardware» more  ISCAS 2008»
13 years 11 months ago
AMBA AHB bus potocol checker with efficient debugging mechanism
—Bus-based system-on-chip (SoC) design becomes the major integration methods for shorting design cycle and time-tomarket, thus how to verify IP functionality on bus protocol is a...
Yi-Ting Lin, Chien-Chou Wang, Ing-Jer Huang