EXPCS
2007
13 years 6 months ago
2007
Pipeline Spectroscopy is a new technique that allows us to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogram, which represents a precis...
CF
2007
ACM
13 years 8 months ago
2007
ACM
In this paper we describe a new technique, called pipeline spectroscopy, and use it to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogra...
SIGMETRICS
1999
ACM
13 years 8 months ago
1999
ACM
This paper examines the feasibility of performing architectural studies with trace sampling for a suite of desktop application traces on Windows NT. This paper makes three contrib...
ICPP
2002
IEEE
13 years 9 months ago
2002
IEEE
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...
MICRO
2003
IEEE
13 years 9 months ago
2003
IEEE
Traditional software controlled data cache prefetching is often ineffective due to the lack of runtime cache miss and miss address information. To overcome this limitation, we imp...
ICPP
2003
IEEE
13 years 9 months ago
2003
IEEE
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
WMPI
2004
ACM
13 years 9 months ago
2004
ACM
Clustered microarchitectures are an effective organization to deal with the problem of wire delays and complexity by partitioning some of the processor resources. The organization ...
ITCC
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper presents a new attack against a software implementation of the Advanced Encryption Standard. The attack aims at flushing elements of the SBOX from the cache, thus indu...
HPCC
2007
Springer
13 years 10 months ago
2007
Springer
Simultaneous Multithreading (SMT)[1][2] and chip multiprocessors (CMP) processors [3] have emerged as the mainstream computing platform in major market segments, including PC, serv...
RTSS
2007
IEEE
13 years 10 months ago
2007
IEEE
In multiprocessor systems, the traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers a...