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EXPCS
2007
12 years 3 months ago
Pipeline spectroscopy
Pipeline Spectroscopy is a new technique that allows us to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogram, which represents a precis...
Thomas R. Puzak, Allan Hartstein, Philip G. Emma, ...
CF
2007
ACM
12 years 5 months ago
An analysis of the effects of miss clustering on the cost of a cache miss
In this paper we describe a new technique, called pipeline spectroscopy, and use it to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogra...
Thomas R. Puzak, Allan Hartstein, Philip G. Emma, ...
SIGMETRICS
1999
ACM
12 years 6 months ago
On the Use of Trace Sampling for Architectural Studies of Desktop Applications
This paper examines the feasibility of performing architectural studies with trace sampling for a suite of desktop application traces on Windows NT. This paper makes three contrib...
Patrick Crowley, Jean-Loup Baer
ICPP
2002
IEEE
12 years 6 months ago
Software Caching using Dynamic Binary Rewriting for Embedded Devices
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...
Chad Huneycutt, Joshua B. Fryman, Kenneth M. Macke...
MICRO
2003
IEEE
100views Hardware» more  MICRO 2003»
12 years 7 months ago
The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System
Traditional software controlled data cache prefetching is often ineffective due to the lack of runtime cache miss and miss address information. To overcome this limitation, we imp...
Jiwei Lu, Howard Chen, Rao Fu, Wei-Chung Hsu, Bobb...
ICPP
2003
IEEE
12 years 7 months ago
Enabling Partial Cache Line Prefetching Through Data Compression
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
Youtao Zhang, Rajiv Gupta
WMPI
2004
ACM
12 years 7 months ago
Cache organizations for clustered microarchitectures
Clustered microarchitectures are an effective organization to deal with the problem of wire delays and complexity by partitioning some of the processor resources. The organization ...
José González, Fernando Latorre, Ant...
ITCC
2005
IEEE
12 years 7 months ago
AES Power Attack Based on Induced Cache Miss and Countermeasure
This paper presents a new attack against a software implementation of the Advanced Encryption Standard. The attack aims at flushing elements of the SBOX from the cache, thus indu...
Guido Bertoni, Vittorio Zaccaria, Luca Breveglieri...
HPCC
2007
Springer
12 years 8 months ago
FROCM: A Fair and Low-Overhead Method in SMT Processor
Simultaneous Multithreading (SMT)[1][2] and chip multiprocessors (CMP) processors [3] have emerged as the mainstream computing platform in major market segments, including PC, serv...
Shuming Chen, Pengyong Ma
RTSS
2007
IEEE
12 years 8 months ago
Bus Access Optimization for Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
In multiprocessor systems, the traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers a...
Jakob Rosen, Alexandru Andrei, Petru Eles, Zebo Pe...
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