ISCA
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
Chip multiprocessors (CMPs) are becoming a popular way of exploiting ever-increasing number of on-chip transistors. At the same time, the location of data on the chip can play a c...
IPCCC
2006
IEEE
13 years 10 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
IISWC
2006
IEEE
13 years 10 months ago
2006
IEEE
— As CMPs are emerging as the dominant architecture for a wide range of platforms (from embedded systems and game consoles, to PCs, and to servers) the need to manage on-chip res...
IEEEPACT
2006
IEEE
13 years 10 months ago
2006
IEEE
The role of the operating system (OS) in managing shared resources such as CPU time, memory, peripherals, and even energy is well motivated and understood [23]. Unfortunately, one...
IEEEPACT
2006
IEEE
13 years 10 months ago
2006
IEEE
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
ICPADS
2006
IEEE
13 years 10 months ago
2006
IEEE
A decentralized game theoretic framework applied to Web caching is discussed. The interaction of multiple clients with a caching server is modeled as a non-cooperative game, in wh...
HPCA
2006
IEEE
13 years 10 months ago
2006
IEEE
Caches are very inefficiently utilized because not all the excess data fetched into the cache, to exploit spatial locality, is utilized. We define cache utilization as the percent...
ECRTS
2006
IEEE
13 years 10 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...