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FMICS
2009
Springer
10 years 6 months ago
Formal Analysis of Non-determinism in Verilog Cell Library Simulation Models
Cell libraries often contain a simulation model in a system design language, such as Verilog. These languages usually involve nondeterminism, which in turn, poses a challenge to th...
Matthias Raffelsieper, Mohammad Reza Mousavi, Jan-...
ACSD
2009
IEEE
136views Hardware» more  ACSD 2009»
10 years 6 months ago
Model Checking Verilog Descriptions of Cell Libraries
We present a formal semantics for a subset of Verilog, commonly used to describe cell libraries, in terms of transition systems. Such transition systems can serve as input to symb...
Matthias Raffelsieper, Jan-Willem Roorda, Mohammad...
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