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VLSID
1996
IEEE
119views VLSI» more  VLSID 1996»
13 years 8 months ago
Parallel simulated annealing strategies for VLSI cell placement
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process, and as a result several research efforts have been un...
John A. Chandy, Prithviraj Banerjee
GECCO
2005
Springer
148views Optimization» more  GECCO 2005»
13 years 10 months ago
Multiobjective VLSI cell placement using distributed genetic algorithm
Genetic Algorithms have worked fairly well for the VLSI cell placement problem, albeit with significant run times. Two parallel models for GA are presented for VLSI cell placemen...
Sadiq M. Sait, Mohammed Faheemuddin, Mahmood R. Mi...