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DC
2008
8 years 3 months ago
Checking sequences for distributed test architectures
This study addresses the construction of a preset checking sequence that will not pose controllability (synchronization) and observability (undetectable output shift) problems whe...
Robert M. Hierons, Hasan Ural
ASE
2010
126views more  ASE 2010»
8 years 3 months ago
Generating a checking sequence with a minimum number of reset transitions
Given a finite state machine M, a checking sequence is an input sequence that is guaranteed to lead to a failure if the implementation under test is faulty and has no more states t...
Robert M. Hierons, Hasan Ural
PTS
2008
80views Hardware» more  PTS 2008»
8 years 4 months ago
Generating Checking Sequences for Partial Reduced Finite State Machines
The problem of generating checking sequences for FSMs with distinguishing sequence has been attracting interest of researchers for several decades. In this paper, a solution is pro...
Adenilso da Silva Simão, Alexandre Petrenko
ISCIS
2005
Springer
8 years 9 months ago
Generalizing Redundancy Elimination in Checking Sequences
Abstract. Based on a distinguishing sequence for a Finite State Machine (FSM), an efficient checking sequence may be produced from the elements of a set Eα of α –sequences and ...
K. Tuncay Tekle, Hasan Ural, M. Cihan Yalcin, H&uu...
ISCIS
2009
Springer
8 years 10 months ago
Using a SAT solver to generate checking sequences
—Methods for software testing based on Finite State Machines (FSMs) have been researched since the early 60’s. Many of these methods are about generating a checking sequence fr...
Guy-Vincent Jourdan, Hasan Ural, Hüsnü Y...
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