EURODAC
1995
IEEE
13 years 8 months ago
1995
IEEE
Recent work has identified the notion of safe replacement for sequential synchronousdesigns that may not have reset hardware or even explicitly known initial states. Safe replace...
DAC
1994
ACM
1994
ACM
Performance Analysis and Optimization of Schedules for Conditional and Loop-Intensive Specifications
13 years 8 months ago
This paper presents a new method,based on Markov chain analysis, to evaluate the performance of schedules of behavioral specifications. The proposed performance measure is the expe...
PATMOS
2004
Springer
13 years 9 months ago
2004
Springer
Synchronization between independently clocked regions in a high performance system is often subject to latencies of more than one clock cycle. We show how the latency can be reduce...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper describes a fast-lock mixed-mode delaylocked loop (MMDLL) for wide-range operation and multiphase outputs. The architecture of the proposed DLL uses the mixed-mode time...