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ASPDAC
2007
ACM
82views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Efficient BMC for Multi-Clock Systems with Clocked Specifications
- Current industry trends in system design -- multiple clocks, clocks with arbitrary frequency ratios, multi-phased clocks, gated clocks, and level-sensitive latches, combined with...
Malay K. Ganai, Aarti Gupta
ASPDAC
2000
ACM
99views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Analysis of power-clocked CMOS with application to the design of energy-recovery circuits
⎯ This paper presents our research results on power-clocked CMOS design. First we provide algebraic expressions and describe properties of clocked signals. Next two types of powe...
Massoud Pedram, Xunwei Wu
CRYPTO
2001
Springer
147views Cryptology» more  CRYPTO 2001»
13 years 9 months ago
Correlation Analysis of the Shrinking Generator
Abstract. The shrinking generator is a well-known keystream generator composed of two linear feedback shift registers, LFSR1 and LFSR2, where LFSR1 is clock-controlled according to...
Jovan Dj. Golic
ASYNC
2003
IEEE
97views Hardware» more  ASYNC 2003»
13 years 9 months ago
Energy and Performance Models for Clocked and Asynchronous Communication
Parameterized first-order models for throughput, energy, and bandwidth are presented in this paper. Models are developed for many common pipeline methodologies, including clocked...
Kenneth S. Stevens