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CSREAESA
2004
10 years 28 days ago
CMOS Implementation of Phase-Encoded Complex-Valued Artificial Neural Networks
- The model of a simple perceptron using phase-encoded inputs and complex-valued weights is presented. Multilayer two-input and three-input complex-valued neurons (CVNs) are implem...
Howard E. Michel, David Rancour, Sushanth Iringent...
VTS
2002
IEEE
121views Hardware» more  VTS 2002»
10 years 4 months ago
Very Low Voltage Testing of SOI Integrated Circuits
Very Low Voltage (VLV) testing has been proposed to increase flaw detection in bulk silicon CMOS integrated circuits and this paper explores these and additional advantages in the...
Eric MacDonald, Nur A. Touba
ISCAS
2002
IEEE
84views Hardware» more  ISCAS 2002»
10 years 4 months ago
Latchup current self-stop circuit for whole-chip latchup prevention in bulk CMOS integrated circuits
A latchup current self-stop methodology and circuit design, which are used to prevent damage in the bulk CMOS integrated circuits due to latchup, are proposed in this paper. In a ...
Jeng-Jie Peng, Ming-Dou Ker, Hsin-Chin Jiang
SBCCI
2004
ACM
134views VLSI» more  SBCCI 2004»
10 years 5 months ago
An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs
This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage s...
Gabriella Trucco, Giorgio Boselli, Valentino Liber...
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