Sciweavers

Share
CODES
2005
IEEE
9 years 9 months ago
An architectural level design methodology for embedded face detection
Face detection and recognition research has attracted great attention in recent years. Automatic face detection has great potential in a large array of application areas, includin...
Vida Kianzad, Sankalita Saha, Jason Schlessman, Ga...
CODES
2005
IEEE
9 years 9 months ago
Energy conscious online architecture adaptation for varying latency constraints in sensor network applications
Sensor network applications face continuously changing environments, which impose varying processing loads on the sensor node. This paper presents an online control method which a...
Sankalp Kallakuri, Alex Doboli
CODES
2005
IEEE
9 years 9 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...
CODES
2005
IEEE
9 years 9 months ago
Future processors: flexible and modular
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
Charlie Johnson, Jeff Welser
CODES
2005
IEEE
9 years 9 months ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...
CODES
2005
IEEE
9 years 9 months ago
Future wireless convergence platforms
As wireless platforms converge to multimedia systems, architectures must converge to support voice, data, and video applications. From a processor architecture perspective, suppor...
C. John Glossner, Mayan Moudgill, Daniel Iancu, Ga...
CODES
2005
IEEE
9 years 9 months ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su
CODES
2005
IEEE
9 years 9 months ago
Blue matter on blue gene/L: massively parallel computation for biomolecular simulation
This paper provides an overview of the Blue Matter application development effort within the Blue Gene project that supports our scientific simulation efforts in the areas of pro...
Robert S. Germain, Blake G. Fitch, Aleksandr Raysh...
CODES
2005
IEEE
9 years 9 months ago
Conflict analysis in multiprocess synthesis for optimized system integration
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...
Oliver Bringmann, Wolfgang Rosenstiel, Axel Sieben...
CODES
2005
IEEE
9 years 9 months ago
Satisfying real-time constraints with custom instructions
Instruction-set extensible processors allow an existing processor core to be extended with application-specific custom instructions. In this paper, we explore a novel application...
Pan Yu, Tulika Mitra
books