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    CODES
    2004
    IEEE
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    Power analysis of system-level on-chip communication architectures
    13 years 8 months ago
    Power analysis of system-level on-chip communication architectures
    Download  esdat.ucsd.edu
    For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
    Kanishka Lahiri, Anand Raghunathan
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