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    ISSS
    2002
    IEEE
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    Controller Estimation for FPGA Target Architectures during High-Level Synthesis
    13 years 9 months ago
    Controller Estimation for FPGA Target Architectures during High-Level Synthesis
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    In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
    Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
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