Sciweavers

    PATMOS
    2004
    Springer
    156views Modeling and Simulation» more  PATMOS 2004»
    Investigation of Low-Power Low-Voltage Circuit Techniques for a Hybrid Full-Adder Cell
    13 years 10 months ago
    Investigation of Low-Power Low-Voltage Circuit Techniques for a Hybrid Full-Adder Cell
    Download  www.dice.ucl.ac.be
    A full-adder implemented by combining branch-based logic and pass-gate logic is presented in this contribution. A comparison between this proposed full-adder (named BBL PT) and its...
    Ilham Hassoune, Amaury Nève, Jean-Didier Le...
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.