Sciweavers

GLOBECOM
2006
IEEE
13 years 9 months ago
On the Parallelism of Convolutional Turbo Decoding and Interleaving Interference
— In forward error correction, convolutional turbo codes were introduced to increase error correction capability approaching the Shannon bound. Decoding of these codes, however, ...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
SIPS
2008
IEEE
13 years 10 months ago
Unified decoder architecture for LDPC/turbo codes
Low-density parity-check (LDPC) codes on par with convolutional turbo codes (CTC) are two of the most powerful error correction codes known to perform very close to the Shannon li...
Yang Sun, Joseph R. Cavallaro
SIPS
2008
IEEE
13 years 10 months ago
High-throughput dual-mode single/double binary map processor design for wireless wan
In this paper we present the VLSI implementation of a high-throughput enhanced Max-log-MAP processor that supports both single-binary (SB) and double-binary (DB) convolutional tur...
Chun-Yu Chen, Cheng-Hung Lin, An-Yeu Wu