CSREAESA
2004
13 years 5 months ago
2004
- MEMS technology has improved such that the capabilities of large sensor devices can now be encompassed in devices that are the size of a penny. These resource constraint devices ...
CSREAESA
2004
13 years 5 months ago
2004
In this paper, we survey various designs of low-power full-adder cells from conventional CMOS to really inventive XOR-based designs. We further describe simulation experiments tha...
CSREAESA
2004
13 years 5 months ago
2004
This paper presents a reconfigurable resource support mechanism to address scheduling issues in distributed embedded environment. A configurable object architecture is employed to...
CSREAESA
2004
13 years 5 months ago
2004
Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because the wires do not scale as fast as the device...
CSREAESA
2004
13 years 5 months ago
2004
In this paper we present an approach to the optimisation of interpreted Java programs using superinstructions. Unlike existing techniques, we examine the feasibility of identifying...
CSREAESA
2004
13 years 5 months ago
2004
Battery lifetime extension is a primary design objective for portable systems. This paper investigates how non-ideal properties of a battery impacts its lifespan. More specificall...
CSREAESA
2004
13 years 5 months ago
2004
- The model of a simple perceptron using phase-encoded inputs and complex-valued weights is presented. Multilayer two-input and three-input complex-valued neurons (CVNs) are implem...
CSREAESA
2004
13 years 5 months ago
2004
: In this paper we focus on the reduction of switching activity in combinational logic circuits. An algorithmic approach using k-map has been proposed which modifies the normal opt...
CSREAESA
2004
13 years 5 months ago
2004
Embedded systems often have limited amounts of available memory, thus encouraging the development of compact programs. This paper presents a link-time program compactor for the emb...
CSREAESA
2004
13 years 5 months ago
2004
In this paper we present an algorithm for automatic extraction of system behavior from a structural Verilog specification. The algorithm generates a series-parallel poset expressi...