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    DAC
    1996
    ACM
    88views Computer Architecture» more  DAC 1996»
    Error Correction Based on Verification Techniques
    13 years 8 months ago
    Error Correction Based on Verification Techniques
    Download  ir.lib.nthu.edu.tw
    Shi-Yu Huang, Kuang-Chien Chen, Kwang-Ting Cheng
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    DAC
    1996
    ACM
    108views Computer Architecture» more  DAC 1996»
    A Fast State Reduction Algorithm for Incompletely Specified Finite State Machines
    13 years 8 months ago
    A Fast State Reduction Algorithm for Incompletely Specified Finite State Machines
    Download  www.cs.york.ac.uk
    Abstract-- This paper proposes a state reduction algorithm for incompletely specified FSMs. The algorithm is based on iterative improvements. When the number of compatibles is like...
    Hiroyuki Higuchi, Yusuke Matsunaga
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    DAC
    1996
    ACM
    83views Computer Architecture» more  DAC 1996»
    Improved Tool and Data Selection in Task Management
    13 years 8 months ago
    Improved Tool and Data Selection in Task Management
    Download  www.cs.york.ac.uk
    Task management involves task creation and execution. These are facilitated using a task schema as exemplified in the Hercules Task Manager. Experience with Hercules has shown the...
    John W. Hagerman, Stephen W. Director
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    DAC
    1996
    ACM
    151views Computer Architecture» more  DAC 1996»
    Pseudorandom-Pattern Test Resistance in High-Performance DSP Datapaths
    13 years 8 months ago
    Pseudorandom-Pattern Test Resistance in High-Performance DSP Datapaths
    Download  www.cs.york.ac.uk
    The testability of basic DSP datapath structures using pseudorandom built-in self-test techniques is examined. The addition of variance mismatched signals is identified as a testi...
    Laurence Goodby, Alex Orailoglu
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    DAC
    1996
    ACM
    113views Computer Architecture» more  DAC 1996»
    Analysis of Operation Delay and Execution Rate Constraints for Embedded Systems
    13 years 8 months ago
    Analysis of Operation Delay and Execution Rate Constraints for Embedded Systems
    Download  www.cecs.uci.edu
    Rajesh K. Gupta
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    DAC
    1996
    ACM
    80views Computer Architecture» more  DAC 1996»
    Using Articulation Nodes to Improve the Efficiency of Finite-Element based Resistance Extraction
    13 years 8 months ago
    Using Articulation Nodes to Improve the Efficiency of Finite-Element based Resistance Extraction
    Download  cas.et.tudelft.nl
    In this paper, we describe how we have improved the efficiency of a finite-element method for interconnect resistance extraction by introducingarticulation nodes in the finiteelem...
    Arjan J. van Genderen, N. P. van der Meijs
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    DAC
    1996
    ACM
    100views Computer Architecture» more  DAC 1996»
    A Register File and Scheduling Model for Application Specific Processor Synthesis
    13 years 8 months ago
    A Register File and Scheduling Model for Application Specific Processor Synthesis
    Download  www.cs.york.ac.uk
    In this paper, we outline general design steps of our synthesis tool to realize application specific co-processors such that for a given scientific application having intensive ite...
    Ehat Ercanli, Christos A. Papachristou
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    DAC
    1996
    ACM
    122views Computer Architecture» more  DAC 1996»
    Integrating Formal Verification Methods with A Conventional Project Design Flow
    13 years 8 months ago
    Integrating Formal Verification Methods with A Conventional Project Design Flow
    Download  www.cs.york.ac.uk
    We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
    Ásgeir Th. Eiríksson
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    DAC
    1996
    ACM
    110views Computer Architecture» more  DAC 1996»
    A Probability-Based Approach to VLSI Circuit Partitioning
    13 years 8 months ago
    A Probability-Based Approach to VLSI Circuit Partitioning
    Download  www.cs.york.ac.uk
    Iterative-improvement 2-way min-cut partitioning is an important phase in most circuit partitioning tools. Most iterative improvement techniques for circuit netlists like the Fidd...
    Shantanu Dutt, Wenyong Deng
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    DAC
    1996
    ACM
    93views Computer Architecture» more  DAC 1996»
    Sizing of Clock Distribution Networks for High Performance CPU Chips
    13 years 8 months ago
    Sizing of Clock Distribution Networks for High Performance CPU Chips
    Download  www.sigda.org
    : In a high performance microprocessor such as Digital's 300MHz Alpha 21164, the distribution of a high quality clock signal to all regions of the device is achieved using a c...
    Madhav P. Desai, Radenko Cvijetic, James Jensen
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