Sciweavers

DAC
1999
ACM
13 years 8 months ago
Improved Approximate Reachability Using Auxiliary State Variables
Approximate reachability techniques trade o accuracy for the capacity to deal with bigger designs. Cho et al 4 proposed partitioning the set of state bits into mutually disjoint s...
Shankar G. Govindaraju, David L. Dill, Jules P. Be...
DAC
1999
ACM
13 years 8 months ago
Panel: What is the Proper System on Chip Design Methodology
ion model or flexible PCB solutions cannot offer a valid solution for the next millinium SoCs . James G. Dougherty, Integrated Systems Silicon LTD, Belfast, Northern Ireland ISS an...
Richard Goering, Pierre Bricaud, James G. Doughert...
DAC
1999
ACM
13 years 8 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
DAC
1999
ACM
13 years 8 months ago
A Practical Approach to Multiple-Class Retiming
Retiming is an optimization technique for synchronous circuits introduced by Leiserson and Saxe in 1983. Although powerful, retiming is not very widely used because it does not ha...
Klaus Eckl, Jean Christophe Madre, Peter Zepter, C...
DAC
1999
ACM
13 years 8 months ago
Using Lower Bounds During Dynamic BDD Minimization
Ordered Binary Decision Diagrams BDDs are a data structure for representation and manipulation of Boolean functions often applied in VLSI CAD. The choice of the variable orderin...
Rolf Drechsler, Wolfgang Günther
DAC
1999
ACM
13 years 8 months ago
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
Alex Doboli, Adrián Núñez-Ald...
DAC
1999
ACM
13 years 8 months ago
Virtual Simulation of Distributed IP-based Designs
Marcello Dalpasso, Alessandro Bogliolo, Luca Benin...
DAC
1999
ACM
13 years 8 months ago
Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits
This paper presents a method to reduce the complexity of a linear or linearized (small-signal) analog circuit. The reduction technique, based on quality-error ranking, can be used...
Walter Daems, Georges G. E. Gielen, Willy M. C. Sa...