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DAC
2003
ACM
9 years 11 months ago
Using a formal specification and a model checker to monitor and direct simulation
We describe a technique for verifying that a hardware design correctly implements a protocol-level formal specification. Simulation steps are translated to protocol state transiti...
Serdar Tasiran, Yuan Yu, Brannon Batson
DAC
2003
ACM
9 years 11 months ago
Partial task assignment of task graphs under heterogeneous resource constraints
This paper presents a novel partial assignment technique (PAT) that decides which tasks should be assigned to the same resource without explicitly defining assignment of these tas...
Radoslaw Szymanek, Krzysztof Kuchcinski
DAC
2003
ACM
9 years 11 months ago
Power grid reduction based on algebraic multigrid principles
With the scaling of technology, power grid noise is becoming increasingly significant for circuit performance. A typical power grid circuit contains millions of linear elements, m...
Haihua Su, Emrah Acar, Sani R. Nassif
DAC
2003
ACM
9 years 11 months ago
Dynamic hardware/software partitioning: a first approach
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
Greg Stitt, Roman L. Lysecky, Frank Vahid
DAC
2003
ACM
9 years 11 months ago
Using estimates from behavioral synthesis tools in compiler-directed design space exploration
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
Byoungro So, Pedro C. Diniz, Mary W. Hall
DAC
2003
ACM
9 years 11 months ago
An O(nlogn) time algorithm for optimal buffer insertion
The classic algorithm for optimal buffer insertion due to van Ginneken has time and space complexity O(n2 ), where n is the number of possible buffer positions. We present a new a...
Weiping Shi, Zhuo Li
DAC
2003
ACM
9 years 11 months ago
A hybrid SAT-based decision procedure for separation logic with uninterpreted functions
SAT-based decision procedures for quantifier-free fragments of firstorder logic have proved to be useful in formal verification. These decision procedures are either based on enco...
Sanjit A. Seshia, Shuvendu K. Lahiri, Randal E. Br...
DAC
2003
ACM
9 years 11 months ago
A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference
In this work, we report on an unprecedented design where digital, analog, and MEMS technologies are combined to realize a generalpurpose single-chip CMOS microsystem. The converge...
Robert M. Senger, Eric D. Marsman, Michael S. McCo...
DAC
2003
ACM
9 years 11 months ago
Test cost reduction for SOCs using virtual TAMs and lagrange multipliers
Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...
Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski,...
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