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    DAC
    2003
    ACM
    166views Computer Architecture» more  DAC 2003»
    Efficient model order reduction including skin effect
    14 years 5 months ago
    Efficient model order reduction including skin effect
    Download  www.ece.northwestern.edu
    Skin effect makes interconnect resistance and inductance frequency dependent. This paper addresses the problem of efficiently estimating the signal characteristics of any RLC netw...
    Shizhong Mei, Chirayu S. Amin, Yehea I. Ismail
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    DAC
    2003
    ACM
    100views Computer Architecture» more  DAC 2003»
    How to make efficient communication, collaboration, and optimization from system to chip
    14 years 5 months ago
    How to make efficient communication, collaboration, and optimization from system to chip
    Download  www.ssc.pe.titech.ac.jp
    Akira Matsuzawa
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    DAC
    2003
    ACM
    175views Computer Architecture» more  DAC 2003»
    Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL
    14 years 5 months ago
    Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL
    Download  www.truecircuits.com
    John G. Maneatis, Jaeha Kim, Iain McClatchie, Jay ...
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    DAC
    2003
    ACM
    141views Computer Architecture» more  DAC 2003»
    Distributed sleep transistor network for power reduction
    14 years 5 months ago
    Distributed sleep transistor network for power reduction
    Download  www.di.ufpe.br
    Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
    Changbo Long, Lei He
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    DAC
    2003
    ACM
    161views Computer Architecture» more  DAC 2003»
    On-chip logic minimization
    14 years 5 months ago
    On-chip logic minimization
    Download  www.cs.ucr.edu
    While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
    Roman L. Lysecky, Frank Vahid
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    DAC
    2003
    ACM
    139views Computer Architecture» more  DAC 2003»
    Scalable modeling and optimization of mode transitions based on decoupled power management architecture
    14 years 5 months ago
    Scalable modeling and optimization of mode transitions based on decoupled power management architecture
    Download  www.ece.uci.edu
    To save energy, many power management policies rely on issuing mode-change commands to the components of the system. Efforts to date have focused on how these policies interact wi...
    Dexin Li, Qiang Xie, Pai H. Chou
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    DAC
    2003
    ACM
    173views Computer Architecture» more  DAC 2003»
    Accurate timing analysis by modeling caches, speculation and their interaction
    14 years 5 months ago
    Accurate timing analysis by modeling caches, speculation and their interaction
    Download  www.comp.nus.edu.sg
    Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
    Xianfeng Li, Tulika Mitra, Abhik Roychoudhury
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    DAC
    2003
    ACM
    160views Computer Architecture» more  DAC 2003»
    Analog and RF circuit macromodels for system-level analysis
    14 years 5 months ago
    Analog and RF circuit macromodels for system-level analysis
    Download  www.ece.cmu.edu
    Design and validation of mixed-signal integrated systems require evel model abstractions. Generalized Volterra series based models have been successfully applied for analog and RF...
    Xin Li, Peng Li, Yang Xu, Lawrence T. Pileggi
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    DAC
    2003
    ACM
    114views Computer Architecture» more  DAC 2003»
    Multilevel floorplanning/placement for large-scale modules using B*-trees
    14 years 5 months ago
    Multilevel floorplanning/placement for large-scale modules using B*-trees
    Download  cc.ee.ntu.edu.tw
    We present in this paper a multilevel floorplanning/placement framework based on the B*-tree representation, called MB*-tree, to handle the floorplanning and packing for large-sca...
    Hsun-Cheng Lee, Yao-Wen Chang, Jer-Ming Hsu, Hanna...
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    DAC
    2003
    ACM
    141views Computer Architecture» more  DAC 2003»
    Interconnect and noise immunity design for the Pentium 4 processor
    14 years 5 months ago
    Interconnect and noise immunity design for the Pentium 4 processor
    Download  download.intel.com
    Rajesh Kumar 0006
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