Sciweavers

DAC
2004
ACM
13 years 8 months ago
Probabilistic regression suites for functional verification
Random test generators are often used to create regression suites on-the-fly. Regression suites are commonly generated by choosing several specifications and generating a number o...
Shai Fine, Shmuel Ur, Avi Ziv
DAC
2004
ACM
13 years 8 months ago
Implicit pseudo boolean enumeration algorithms for input vector control
In a CMOS combinational logic circuit, the subthreshold leakage current in the standby state depends on the state of the inputs. In this paper we present a new approach to identif...
Kaviraj Chopra, Sarma B. K. Vrudhula
DAC
2004
ACM
13 years 8 months ago
Leakage in nano-scale technologies: mechanisms, impact and design considerations
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
Amit Agarwal, Chris H. Kim, Saibal Mukhopadhyay, K...
DAC
2004
ACM
13 years 8 months ago
Statistical gate delay model considering multiple input switching
There is an increased dominance of intra-die process variations, creating a need for an accurate and fast statistical timing analysis. Most of the recent proposed approaches assum...
Aseem Agarwal, Florentin Dartu, David Blaauw
DAC
2004
ACM
13 years 10 months ago
Large-scale placement by grid-warping
Grid-warping is a new placement algorithm based on a strikingly simple idea: rather than move the gates to optimize their location, we elastically deform a model of the 2-0 chip s...
Zhong Xiu, James D. Z. Ma, Suzanne M. Fowler, Rob ...
DAC
2004
ACM
13 years 10 months ago
Hierarchical approach to exact symbolic analysis of large analog circuits
—This paper proposes a novel approach to the exact symbolic analysis of very large analog circuits. The new method is based on determinant decision diagrams (DDDs) representing s...
Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi
DAC
2004
ACM
13 years 10 months ago
Parametric yield estimation considering leakage variability
Leakage current has become a stringent constraint in today’s processor designs in addition to traditional constraints on frequency. Since leakage current exhibits a strong inver...
Rajeev R. Rao, Anirudh Devgan, David Blaauw, Denni...
DAC
2004
ACM
13 years 10 months ago
Extending the transaction level modeling approach for fast communication architecture exploration
System-on-Chip (SoC) designs are increasingly becoming more complex. Efficient on-chip communication architectures are critical for achieving desired performance in these systems....
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
DAC
2004
ACM
13 years 10 months ago
A new state assignment technique for testing and low power
In order to improve the testabilities and power consumption, a new state assignment technique based on m-block partition is introduced in this paper. The length and number of feed...
Sungju Park, Sangwook Cho, Seiyang Yang, Maciej J....