DAC
2008
ACM
14 years 5 months ago
2008
ACM
DAC
2008
ACM
2008
ACM
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing
14 years 5 months ago
Single-chip parallel processing requires high bandwidth between processors and on-chip memory modules. A recently proposed Mesh-of-Trees (MoT) network provides high throughput and...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
Multimedia-dominated consumer electronics devices (such as cellular phone, digital camera, etc.) operate under soft real-time constraints. Overly pessimistic worst-case execution ...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
The creation of an FPGA requires extensive transistor-level design. This is necessary for both the final design, and during architecture exploration, when many different logic and...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
Due to recent advances in microfluidics technology, digital microfluidic biochips and their associated CAD problems have gained much attention, most of which has been devoted to d...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
A SystemC simulation kernel consists of a deterministic implementation of the scheduler, whose specification is nondeterministic. To leverage testing of a SystemC TLM design, we f...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
SystemCoDesigner is an ESL tool developed at the University of Erlangen-Nuremberg, Germany. SystemCoDesigner offers a fast design space exploration and rapid prototyping of behavi...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
In modular testing of system-on-a-chip (SoC), test access mechanisms (TAMs) are used to transport test data between the input/output pins of the SoC and the cores under test. Prio...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
Boolean function bi-decomposition is a fundamental operation in logic synthesis. A function f(X) is bi-decomposable under a variable partition XA, XB, XC on X if it can be written...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...