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IPPS
2000
IEEE
13 years 9 months ago
Dynamic Data Layouts for Cache-Conscious Factorization of DFT
Effective utilization of cache memories is a key factor in achieving high performance in computing the Discrete Fourier Transform (DFT). Most optimizationtechniques for computing ...
Neungsoo Park, Dongsoo Kang, Kiran Bondalapati, Vi...
FCCM
2003
IEEE
96views VLSI» more  FCCM 2003»
13 years 9 months ago
Data Search and Reorganization Using FPGAs: Application to Spatial Pointer-based Data Structures
FPGAs have appealing features such as customizable internal and external bandwidth and the ability to exploit vast amounts of fine-grain parallelism. In this paper we explore the ...
Pedro C. Diniz, Joonseok Park
PLDI
2004
ACM
13 years 10 months ago
Vectorization for SIMD architectures with alignment constraints
When vectorizing for SIMD architectures that are commonly employed by today’s multimedia extensions, one of the new challenges that arise is the handling of memory alignment. Pr...
Alexandre E. Eichenberger, Peng Wu, Kevin O'Brien