DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
We propose a conceptual framework, called the Rugby Model, in which designs, design processes and design tools can be studied. It is an extension of the Y chart and adds two dimen...
DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
Previous work has shown that sizable power reductions can be achieved by shutting down a system's sub-circuits when they are not needed. However, these shutdown techniques fo...
DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
If real number calculations are implemented as circuits, only a limited preciseness can be obtained. Hence, formal verification can not be used to prove the equivalence between th...
DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
Reachability analysis of finite state machines is essential to many computer-aided design applications. We present new techniques to improve both approximate and exact reachabilit...
DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
The paper introduces the new concept of symmetric transparent BIST for RAMs. This concept allows to skip the signature prediction phase of conventional transparent BIST approaches...
DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
As society has become more reliant on electronics, the need for fault tolerant ICs has increased. This has resulted in signi cant research into both fault tolerant controller desi...
DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
We describe EXPRESSION, a language supporting architectural design space exploration for embedded Systems-onChip (SOC) and automatic generation of a retargetable compiler/simulato...
DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
This paper proposes a methodology to evaluate the effects of encodings on the power consumption of system-level buses in the presence of multi-level cache memories. The proposed m...