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DATE
2003
IEEE
103views Hardware» more  DATE 2003»
13 years 9 months ago
Reduced Delay Uncertainty in High Performance Clock Distribution Networks
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....
DATE
2003
IEEE
113views Hardware» more  DATE 2003»
13 years 9 months ago
Design Space Exploration for a Wireless Protocol on a Reconfigurable Platform
This paper describes a design space exploration experiment for a real application from the embedded networking domain - the physical layer of a wireless protocol. The application ...
Laura Vanzago, Bishnupriya Bhattacharya, Joel Camb...
DATE
2003
IEEE
94views Hardware» more  DATE 2003»
13 years 9 months ago
SystemC-AMS Requirements, Design Objectives and Rationale
SystemC is emerging as a de-facto standard for system design but it still lacks support for continuous-time models of computation and multi-domain systems. This becomes an issue a...
Alain Vachoux, Christoph Grimm, Karsten Einwich
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
13 years 9 months ago
Safe Automotive Software Development
Automotive systems engineering has made significant progress in using formal methods to design safe hardware-software systems. The architectures and design methods could become a ...
Ken Tindell, Hermann Kopetz, Fabian Wolf, Rolf Ern...
DATE
2003
IEEE
75views Hardware» more  DATE 2003»
13 years 9 months ago
Self-Testing Embedded Checkers for Bose-Lin, Bose, and a Class of Borden Codes
—A new approach for designing t-UED and BUED code checkers is presented. In particular we consider Borden codes for t = 2k − 1, Bose and Bose-Lin codes. The design technique fo...
Steffen Tarnick
DATE
2003
IEEE
87views Hardware» more  DATE 2003»
13 years 9 months ago
A Novel, Low-Cost Algorithm for Sequentially Untestable Fault Identification
This paper presents a new and low-cost approach for identifying sequentially untestable faults. Unlike the single fault theorem, where the stuck-at fault is injected only in the r...
Manan Syal, Michael S. Hsiao
DATE
2003
IEEE
97views Hardware» more  DATE 2003»
13 years 9 months ago
Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
G. Surendra, Subhasis Banerjee, S. K. Nandy
DATE
2003
IEEE
63views Hardware» more  DATE 2003»
13 years 9 months ago
NPSE: A High Performance Network Packet Search Engine
This paper describes the NPSE, a high-performance SRAM-based network packet search engine which has the primary application of supporting IPv4 and IPv6 forwarding. It is based on ...
Naresh Soni, Nick Richardson, Lun Bin Huang, Sures...
DATE
2003
IEEE
120views Hardware» more  DATE 2003»
13 years 9 months ago
Crosstalk Reduction in Area Routing
Interconnect delay dominates system delay in modern circuits, and with reduced feature sizes, coupling capacitance and signal crosstalk have become significant issues. By spacing...
Ryon M. Smey, Bill Swartz, Patrick H. Madden