DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
Code size and energy consumption are critical design concerns for embedded processors as they determine the cost of the overall system. Techniques such as reduced length instructi...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
Software-based self-test (SBST) of processors offers many benefits, such as dispense with expensive test equipments, test execution during maintenance and in the field or initiali...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
: This paper presents a domain decomposition (DD) technique for efficient simulation of large-scale linear circuits such as power distribution networks. Simulation results show th...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
State of the art statistical timing analysis (STA) tools often yield less accurate results when timing variables become correlated. Spatial correlation and correlation caused by p...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper presents an RSA hardware design that simultaneously achieves high-performance and lowpower. A bit-oriented, split modular multiplication algorithm and architecture are ...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper presents novel double sampling high order single-loop sigma-delta modulator structures for wideband applications. To alleviate the quantization noise folding into the i...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper presents a systematic and optimal design of hybrid cascode compensation method which is used in fully differential two-stage CMOS operational transconductance amplifier...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
A concurrent core test approach is proposed to reduce the test cost of SOC. Multiple cores in SOC can be tested simultaneously by using a shared test set and scan chain disable. P...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
In this paper, a wavelet based approach is proposed for the model order reduction of linear circuits in time domain. Compared with Chebyshev reduction method, the wavelet reductio...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
Verification quality is a must for functional safety in electronic systems. In automotive, the verification flow is historically based on a layered approach, where each level (mod...