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DATE
2008
IEEE
124views Hardware» more  DATE 2008»
13 years 11 months ago
Sizing Rules for Bipolar Analog Circuit Design
This paper presents sizing rules for basic building blocks in analog bipolar circuit design. Sizing rules efficiently capture design knowledge on the technology-specific level o...
Tobias Massier, Helmut E. Graeb, Ulf Schlichtmann
DATE
2008
IEEE
155views Hardware» more  DATE 2008»
13 years 11 months ago
Comparison of memory write policies for NoC based Multicore Cache Coherent Systems
The following study shows a direct comparison of memory write policies in Shared Memory Multicore Systems. Although there are much work and many studies about this issue, our work...
Pierre Guironnet de Massas, Frédéric...
DATE
2008
IEEE
129views Hardware» more  DATE 2008»
13 years 11 months ago
Quantitative Evaluation in Embedded System Design: Trends in Modeling and Analysis Techniques
The evaluation of extra-functional properties of embedded systems, such as reliability, timeliness, and energy consumption, as well as dealing with uncertainty, e.g., in the timin...
Joost-Pieter Katoen
DATE
2008
IEEE
133views Hardware» more  DATE 2008»
13 years 11 months ago
Globally Optimized Robust Systems to Overcome Scaled CMOS Reliability Challenges
Future system design methodologies must accept the fact that the underlying hardware will be imperfect, and enable design of robust systems that are resilient to hardware imperfec...
Subhasish Mitra
DATE
2008
IEEE
113views Hardware» more  DATE 2008»
13 years 11 months ago
Random Stimulus Generation using Entropy and XOR Constraints
Despite the growing research effort in formal verification, constraint-based random simulation remains an integral part of design validation, especially for large design componen...
Stephen Plaza, Igor L. Markov, Valeria Bertacco
DATE
2008
IEEE
123views Hardware» more  DATE 2008»
13 years 11 months ago
Verification of Temporal Properties in Automotive Embedded Software
Djones Lettnin, Pradeep Kumar Nalla, Jürgen R...
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
13 years 11 months ago
On Automated Trigger Event Generation in Post-Silicon Validation
When searching for functional bugs in silicon, debug data is acquired after a trigger event occurs. A trigger event can be configured at run-time using a set of control registers...
Ho Fai Ko, Nicola Nicolici
DATE
2008
IEEE
114views Hardware» more  DATE 2008»
13 years 11 months ago
Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors
—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-...
Sanghyun Park, Aviral Shrivastava, Yunheung Paek
DATE
2008
IEEE
120views Hardware» more  DATE 2008»
13 years 11 months ago
Error Detection/Correction in DNA Algorithmic Self-Assembly
A novel error detection/correction technique for algorithmic self-assembly is presented in this paper. Through the use of a tile set that allows errors to be isolated and propagat...
Stephen Frechette, Fabrizio Lombardi