DAC
2007
ACM
13 years 8 months ago
2007
ACM
With the continuous increase of circuit density, interconnect length, and aspect ratio, the influence of capacitive and inductive coupling on timing characteristics of integrated ...
GLVLSI
2010
IEEE
13 years 9 months ago
2010
IEEE
A methodology is proposed for designing robust circuits exhibiting higher tolerance to process and environmental variations. This higher tolerance is achieved by exploiting the in...
VLSID
2004
IEEE
14 years 4 months ago
2004
IEEE
Reduction of worst-case delay and delay uncertainty due to capacitive coupling is a still unsolved problem in physical design. We describe a routing only layout solution - swizzli...