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    On Area/Depth Trade-off in LUT-Based FPGA Technology Mapping
    13 years 8 months ago
    On Area/Depth Trade-off in LUT-Based FPGA Technology Mapping
    Download  cadlab.cs.ucla.edu
    In this paper we study the area and depth trade-off in LUT based FPGA technology mapping. Starting from a depth-optimal mapping solution, we perform a number of depth relaxation o...
    Jason Cong, Yuzheng Ding
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