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    SBCCI
    2006
    ACM
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    REDEFIS: a system with a redefinable instruction set processor
    13 years 10 months ago
    REDEFIS: a system with a redefinable instruction set processor
    Download  qir.kyushu-u.ac.jp
    The growing complexity and production cost of processor-based systems have imposed big constraints in SoC design of new systems. GPPs and ASICs are unable to fit the tight perform...
    Victor M. Goulart Ferreira, Lovic Gauthier, Takayu...
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