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CODES
2004
IEEE
9 years 6 days ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
DAC
1997
ACM
9 years 20 days ago
Methodology for Behavioral Synthesis-Based Algorithm-Level Design Space Exploration: DCT Case Study
: Numerous fast algorithms for the Discrete Cosine Transform DCT have been proposed. Until recently, it has been di cult to compare di erent DCT algorithms and select one which i...
Miodrag Potkonjak, Kyosun Kim, Ramesh Karri
ISSS
2002
IEEE
124views Hardware» more  ISSS 2002»
9 years 1 months ago
A New Performance Evaluation Approach for System Level Design Space Exploration
Application specific systems have potential for customization of design with a view to achieve a better costperformance-power trade-off. Such customization requires extensive de...
M. Balakrishnan, Anshul Kumar, C. P. Joshi
DATE
2002
IEEE
206views Hardware» more  DATE 2002»
9 years 1 months ago
Accurate Area and Delay Estimators for FPGAs
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
Anshuman Nayak, Malay Haldar, Alok N. Choudhary, P...
ISCAS
2003
IEEE
123views Hardware» more  ISCAS 2003»
9 years 1 months ago
Fast prototyping of reconfigurable architectures from a C program
Rapid evaluation and design space exploration at the algorithmic level are important issues in the design cycle. In this paper we propose an original area vs delay estimation meth...
Sebastien Bilavarn, Guy Gogniat, Jean Luc Philippe...
GLVLSI
2003
IEEE
129views VLSI» more  GLVLSI 2003»
9 years 1 months ago
A system-level methodology for fast multi-objective design space exploration
In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized systems. Since the design space is multi-objective, our aim ...
Gianluca Palermo, Cristina Silvano, S. Valsecchi, ...
DATE
2003
IEEE
118views Hardware» more  DATE 2003»
9 years 1 months ago
Multi-Granularity Metrics for the Era of Strongly Personalized SOCs
This paper details the first step of the Design Trotter framework for design space exploration applied to dedicated SOCs. The aim of this step is to provide metrics in order to gu...
Yannick Le Moullec, Nahla Ben Amor, Jean-Philippe ...
CIKM
2004
Springer
9 years 1 months ago
A design space approach to analysis of information retrieval adaptive filtering systems
In this paper we suggest a new approach to analysis and design of IR systems. We argue for design space exploration in constructing IR systems and in analyzing the effects of ind...
Dmitriy Fradkin, Paul B. Kantor
ASPDAC
2004
ACM
109views Hardware» more  ASPDAC 2004»
9 years 1 months ago
Resource-constrained low-power bus encoding with crosstalk delay elimination
— In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper,...
Meeyoung Cha, Chun-Gi Lyuh, Taewhan Kim
SAMOS
2005
Springer
9 years 1 months ago
A Case for Visualization-Integrated System-Level Design Space Exploration
Design space exploration plays an essential role in the system-level design of embedded systems. It is imperative therefore to have efficient and effective exploration tools in th...
Andy D. Pimentel
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