Sciweavers

DATE
2010
IEEE
188views Hardware» more  DATE 2010»
13 years 9 months ago
Power-accuracy tradeoffs in human activity transition detection
— Wearable, mobile computing platforms are envisioned to be used in out-patient monitoring and care. These systems continuously perform signal filtering, transformations, and cla...
Jeffrey Boyd, Hari Sundaram, Aviral Shrivastava
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
13 years 9 months ago
Automated bottleneck-driven design-space exploration of media processing systems
Abstract—Media processing systems often have limited resources and strict performance requirements. An implementation must meet those design constraints while minimizing resource...
Yang Yang, Marc Geilen, Twan Basten, Sander Stuijk...
RSP
2003
IEEE
103views Control Systems» more  RSP 2003»
13 years 9 months ago
An Instruction Throughput Model of Superscalar Processors
With advances in semiconductor technology, processors are becoming larger and more complex. Future processor designers will face an enormous design space, and must evaluate more a...
Tarek M. Taha, D. Scott Wills
GLVLSI
2003
IEEE
129views VLSI» more  GLVLSI 2003»
13 years 9 months ago
A system-level methodology for fast multi-objective design space exploration
In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized systems. Since the design space is multi-objective, our aim ...
Gianluca Palermo, Cristina Silvano, S. Valsecchi, ...
ECBS
2003
IEEE
111views Hardware» more  ECBS 2003»
13 years 9 months ago
Multigranular Simulation of Heterogeneous Embedded Systems
Heterogeneous embedded systems, where configurable or application specific hardware devices (FPGAs and ASICs) are used alongside traditional processors, are becoming more and more...
Aditya Agrawal, Ákos Lédeczi
CODES
2003
IEEE
13 years 9 months ago
Schedule-aware performance estimation of communication architecture for efficient design space exploration
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
Sungchan Kim, Chaeseok Im, Soonhoi Ha
IPSN
2004
Springer
13 years 9 months ago
Constraint-guided dynamic reconfiguration in sensor networks
This paper presents an approach for dynamic software reconfiguration in sensor networks. Our approach utilizes explicit models of the design space of the embedded application. The...
Sachin Kogekar, Sandeep Neema, Brandon Eames, Xeno...
ASIAN
2004
Springer
107views Algorithms» more  ASIAN 2004»
13 years 9 months ago
A Framework for Compiler Driven Design Space Exploration for Embedded System Customization
Designing custom solutions has been central to meeting a range of stringent and specialized needs of embedded computing, along such dimensions as physical size, power consumption, ...
Krishna V. Palem, Lakshmi N. Chakrapani, Sudhakar ...
SAC
2004
ACM
13 years 9 months ago
L0 buffer energy optimization through scheduling and exploration
Clustered L0 buffers are an interesting alternative to reduce energy consumption in the instruction memory hierarchy of embedded VLIW processors. Currently, the synthesis of L0 cl...
Murali Jayapala, Tom Vander Aa, Francisco Barat, G...
CASES
2004
ACM
13 years 9 months ago
Balancing design options with Sherpa
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
Timothy Sherwood, Mark Oskin, Brad Calder