DFT
2000
IEEE
13 years 8 months ago
2000
IEEE
We present a configuration technique for a Large Area Integrated Circuit (LAIC) which is manufactured by wafer stepping. A LAIC consists of four identical subsystems, i.e., a subs...
DFT
2000
IEEE
13 years 8 months ago
2000
IEEE
DFT
2000
IEEE
13 years 9 months ago
2000
IEEE
Many fault-tolerant architectures are based on the single-fault assumption, hence accumulation of dormant faults represents a potential reliability hazard. Based on the example of...
DFT
2000
IEEE
13 years 9 months ago
2000
IEEE
1 Over the last years, an increasing number of safety-critical tasks have been demanded to computer systems. In particular, safety-critical computer-based applications are hitting ...
DFT
2000
IEEE
13 years 9 months ago
2000
IEEE
Because domino logic design offers smaller area and higher speed than complementary CMOS design, it has been very popularly used to design highperformance processors. However: dom...